-- Copyright (C) 1991-2005 Altera Corporation
-- Your use of Altera Corporation's design tools, logic functions 
-- and other software and tools, and its AMPP partner logic       
-- functions, and any output files any of the foregoing           
-- (including device programming or simulation files), and any    
-- associated documentation or information are expressly subject  
-- to the terms and conditions of the Altera Program License      
-- Subscription Agreement, Altera MegaCore Function License       
-- Agreement, or other applicable license agreement, including,   
-- without limitation, that your use is for the sole purpose of   
-- programming logic devices manufactured by Altera and sold by   
-- Altera or its authorized distributors.  Please refer to the    
-- applicable agreement for further details.

-- VENDOR "Altera"
-- PROGRAM "Quartus II"
-- VERSION "Version 5.0 Build 171 11/03/2005 Service Pack 2 SJ Full Version"

-- DATE "09/14/2012 11:57:15"

-- 
-- Device: Altera EPM570T144C5 Package TQFP144
-- 

-- 
-- This VHDL file should be used for ModelSim-Altera (VHDL) only
-- 

LIBRARY IEEE, maxii;
USE IEEE.std_logic_1164.all;
USE maxii.maxii_components.all;

ENTITY 	Lcd IS
    PORT (
	Nce : IN std_logic;
	Noe : IN std_logic;
	Nwe : IN std_logic;
	SysAddrBus : IN std_logic_vector(23 DOWNTO 0);
	SysDatBus : IN std_logic_vector(15 DOWNTO 0);
	Clk10K : IN std_logic;
	Clk25M : IN std_logic;
	LcdPWM : OUT std_logic;
	LcdDE : OUT std_logic;
	LcdVS : OUT std_logic;
	LcdHS : OUT std_logic
	);
END Lcd;

ARCHITECTURE structure OF Lcd IS
SIGNAL gnd : std_logic := '0';
SIGNAL vcc : std_logic := '1';
SIGNAL devoe : std_logic := '0';
SIGNAL devclrn : std_logic := '1';
SIGNAL devpor : std_logic := '1';
SIGNAL ww_devoe : std_logic;
SIGNAL ww_devclrn : std_logic;
SIGNAL ww_devpor : std_logic;
SIGNAL ww_Nce : std_logic;
SIGNAL ww_Noe : std_logic;
SIGNAL ww_Nwe : std_logic;
SIGNAL ww_SysAddrBus : std_logic_vector(23 DOWNTO 0);
SIGNAL ww_SysDatBus : std_logic_vector(15 DOWNTO 0);
SIGNAL ww_Clk10K : std_logic;
SIGNAL ww_Clk25M : std_logic;
SIGNAL ww_LcdPWM : std_logic;
SIGNAL ww_LcdDE : std_logic;
SIGNAL ww_LcdVS : std_logic;
SIGNAL ww_LcdHS : std_logic;
SIGNAL Clk25M_acombout : std_logic;
SIGNAL Clk10K_acombout : std_logic;
SIGNAL inst_aadd_a111 : std_logic;
SIGNAL inst_aLcdBkpPwrCnt_a0_a : std_logic;
SIGNAL inst_aadd_a113 : std_logic;
SIGNAL inst_aadd_a113COUT1_122 : std_logic;
SIGNAL inst_aadd_a106 : std_logic;
SIGNAL inst_aLcdBkpPwrCnt_a1_a : std_logic;
SIGNAL inst_aadd_a108 : std_logic;
SIGNAL inst_aadd_a108COUT1_123 : std_logic;
SIGNAL inst_aadd_a96 : std_logic;
SIGNAL inst_aLcdBkpPwrCnt_a2_a : std_logic;
SIGNAL inst_aadd_a98 : std_logic;
SIGNAL inst_aadd_a98COUT1 : std_logic;
SIGNAL inst_aadd_a91 : std_logic;
SIGNAL inst_aLcdBkpPwrCnt_a3_a : std_logic;
SIGNAL inst_aadd_a93 : std_logic;
SIGNAL inst_aadd_a101 : std_logic;
SIGNAL inst_aLcdBkpPwrCnt_a4_a : std_logic;
SIGNAL inst_areduce_nor_a32 : std_logic;
SIGNAL inst_aadd_a103 : std_logic;
SIGNAL inst_aadd_a103COUT1_124 : std_logic;
SIGNAL inst_aadd_a116 : std_logic;
SIGNAL inst_aLcdBkpPwrCnt_a5_a : std_logic;
SIGNAL inst_areduce_nor_a4 : std_logic;
SIGNAL inst_aLcdPWMCache : std_logic;
SIGNAL inst5_aadd_a163COUT1_202 : std_logic;
SIGNAL inst5_aadd_a158 : std_logic;
SIGNAL inst5_aadd_a158COUT1_203 : std_logic;
SIGNAL inst5_aadd_a151 : std_logic;
SIGNAL inst5_areduce_nor_a1432 : std_logic;
SIGNAL inst5_aadd_a161 : std_logic;
SIGNAL inst5_aLcdHSCnt_a0_a : std_logic;
SIGNAL inst5_aadd_a163 : std_logic;
SIGNAL inst5_aadd_a156 : std_logic;
SIGNAL inst5_aLcdHSCnt_a1_a : std_logic;
SIGNAL inst5_aLcdHSCnt_a2_a : std_logic;
SIGNAL inst5_aadd_a153 : std_logic;
SIGNAL inst5_aadd_a153COUT1_204 : std_logic;
SIGNAL inst5_aadd_a173COUT1_205 : std_logic;
SIGNAL inst5_aadd_a178 : std_logic;
SIGNAL inst5_aadd_a193 : std_logic;
SIGNAL inst5_aadd_a193COUT1_206 : std_logic;
SIGNAL inst5_aadd_a166 : std_logic;
SIGNAL inst5_aLcdHSCnt_a6_a : std_logic;
SIGNAL inst5_aadd_a168 : std_logic;
SIGNAL inst5_aadd_a168COUT1_207 : std_logic;
SIGNAL inst5_aadd_a183 : std_logic;
SIGNAL inst5_aadd_a183COUT1_208 : std_logic;
SIGNAL inst5_aadd_a186 : std_logic;
SIGNAL inst5_aLcdHSCnt_a8_a : std_logic;
SIGNAL inst5_aadd_a188 : std_logic;
SIGNAL inst5_aadd_a188COUT1_209 : std_logic;
SIGNAL inst5_aadd_a196 : std_logic;
SIGNAL inst5_aLcdHSCnt_a9_a : std_logic;
SIGNAL inst5_areduce_nor_a1436 : std_logic;
SIGNAL inst5_aadd_a181 : std_logic;
SIGNAL inst5_aLcdHSCnt_a7_a : std_logic;
SIGNAL inst5_areduce_nor_a1437 : std_logic;
SIGNAL inst5_aadd_a191 : std_logic;
SIGNAL inst5_aLcdHSCnt_a5_a : std_logic;
SIGNAL inst5_aadd_a171 : std_logic;
SIGNAL inst5_aLcdHSCnt_a3_a : std_logic;
SIGNAL inst5_aadd_a173 : std_logic;
SIGNAL inst5_aadd_a176 : std_logic;
SIGNAL inst5_aLcdHSCnt_a4_a : std_logic;
SIGNAL inst5_areduce_nor_a1439 : std_logic;
SIGNAL inst5_areduce_nor_a1445 : std_logic;
SIGNAL inst5_areduce_nor_a1443 : std_logic;
SIGNAL inst5_areduce_nor_a1444 : std_logic;
SIGNAL inst5_areduce_nor_a1441 : std_logic;
SIGNAL inst5_areduce_nor_a1433 : std_logic;
SIGNAL inst5_areduce_nor_a1442 : std_logic;
SIGNAL inst5_areduce_nor_a1446 : std_logic;
SIGNAL inst5_areduce_nor_a1440 : std_logic;
SIGNAL inst5_areduce_nor_a1434 : std_logic;
SIGNAL inst5_areduce_nor_a1435 : std_logic;
SIGNAL inst5_areduce_nor_a1438 : std_logic;
SIGNAL inst5_aSelect_a244 : std_logic;
SIGNAL inst5_aLcdDE : std_logic;
SIGNAL inst7_aadd_a166 : std_logic;
SIGNAL inst7_aLcdVSCnt_a5_a : std_logic;
SIGNAL inst7_aadd_a168 : std_logic;
SIGNAL inst7_aadd_a168COUT1_206 : std_logic;
SIGNAL inst7_aadd_a161 : std_logic;
SIGNAL inst7_aLcdVSCnt_a6_a : std_logic;
SIGNAL inst7_aadd_a163 : std_logic;
SIGNAL inst7_aadd_a163COUT1_207 : std_logic;
SIGNAL inst7_aadd_a156 : std_logic;
SIGNAL inst7_aLcdVSCnt_a7_a : std_logic;
SIGNAL inst7_aLcdVSCnt_a8_a : std_logic;
SIGNAL inst7_aadd_a158 : std_logic;
SIGNAL inst7_aadd_a158COUT1_208 : std_logic;
SIGNAL inst7_aadd_a151 : std_logic;
SIGNAL inst7_areduce_nor_a1358 : std_logic;
SIGNAL inst7_aLcdVSCnt_a0_a : std_logic;
SIGNAL inst7_aadd_a186 : std_logic;
SIGNAL inst7_areduce_nor_a1359 : std_logic;
SIGNAL inst7_areduce_nor_a4 : std_logic;
SIGNAL inst7_aadd_a188 : std_logic;
SIGNAL inst7_aadd_a188COUT1_202 : std_logic;
SIGNAL inst7_aadd_a191 : std_logic;
SIGNAL inst7_aLcdVSCnt_a1_a : std_logic;
SIGNAL inst7_aadd_a193 : std_logic;
SIGNAL inst7_aadd_a193COUT1_203 : std_logic;
SIGNAL inst7_aadd_a176 : std_logic;
SIGNAL inst7_aLcdVSCnt_a2_a : std_logic;
SIGNAL inst7_aadd_a178 : std_logic;
SIGNAL inst7_aadd_a178COUT1_204 : std_logic;
SIGNAL inst7_aadd_a181 : std_logic;
SIGNAL inst7_aLcdVSCnt_a3_a : std_logic;
SIGNAL inst7_aadd_a183 : std_logic;
SIGNAL inst7_aadd_a183COUT1_205 : std_logic;
SIGNAL inst7_aadd_a171 : std_logic;
SIGNAL inst7_aLcdVSCnt_a4_a : std_logic;
SIGNAL inst7_aadd_a173 : std_logic;
SIGNAL inst7_aadd_a153 : std_logic;
SIGNAL inst7_aadd_a153COUT1_209 : std_logic;
SIGNAL inst7_aadd_a196 : std_logic;
SIGNAL inst7_aLcdVSCnt_a9_a : std_logic;
SIGNAL inst7_areduce_nor_a2 : std_logic;
SIGNAL inst7_areduce_nor_a1360 : std_logic;
SIGNAL inst7_areduce_nor_a1361 : std_logic;
SIGNAL inst7_aSelect_a256 : std_logic;
SIGNAL inst7_areduce_nor_a1365 : std_logic;
SIGNAL inst7_areduce_nor_a1364 : std_logic;
SIGNAL inst7_areduce_nor_a1362 : std_logic;
SIGNAL inst7_areduce_nor_a1363 : std_logic;
SIGNAL inst7_areduce_nor_a1366 : std_logic;
SIGNAL inst7_aLcdDE : std_logic;
SIGNAL inst8 : std_logic;
SIGNAL inst5_aSelect_a246 : std_logic;
SIGNAL inst5_areduce_nor_a2 : std_logic;
SIGNAL inst5_aLcdHS : std_logic;
SIGNAL inst7_aSelect_a258 : std_logic;
SIGNAL inst7_aSelect_a259 : std_logic;
SIGNAL inst7_aLcdVS : std_logic;

BEGIN

ww_Nce <= Nce;
ww_Noe <= Noe;
ww_Nwe <= Nwe;
ww_SysAddrBus <= SysAddrBus;
ww_SysDatBus <= SysDatBus;
ww_Clk10K <= Clk10K;
ww_Clk25M <= Clk25M;
LcdPWM <= ww_LcdPWM;
LcdDE <= ww_LcdDE;
LcdVS <= ww_LcdVS;
LcdHS <= ww_LcdHS;
ww_devoe <= devoe;
ww_devclrn <= devclrn;
ww_devpor <= devpor;

Clk25M_aI : maxii_io
-- pragma translate_off
GENERIC MAP (
	operation_mode => "input")
-- pragma translate_on
PORT MAP (
	oe => GND,
	padio => ww_Clk25M,
	combout => Clk25M_acombout);

Clk10K_aI : maxii_io
-- pragma translate_off
GENERIC MAP (
	operation_mode => "input")
-- pragma translate_on
PORT MAP (
	oe => GND,
	padio => ww_Clk10K,
	combout => Clk10K_acombout);

inst_aadd_a111_I : maxii_lcell
-- Equation(s):
-- inst_aadd_a111 = !inst_aLcdBkpPwrCnt_a0_a
-- inst_aadd_a113 = CARRY(inst_aLcdBkpPwrCnt_a0_a)
-- inst_aadd_a113COUT1_122 = CARRY(inst_aLcdBkpPwrCnt_a0_a)

-- pragma translate_off
GENERIC MAP (
	operation_mode => "arithmetic",
	synch_mode => "off",
	register_cascade_mode => "off",
	sum_lutc_input => "datac",
	lut_mask => "33CC",
	output_mode => "comb_only")
-- pragma translate_on
PORT MAP (
	datab => inst_aLcdBkpPwrCnt_a0_a,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	combout => inst_aadd_a111,
	cout0 => inst_aadd_a113,
	cout1 => inst_aadd_a113COUT1_122);

inst_aLcdBkpPwrCnt_a0_a_aI : maxii_lcell
-- Equation(s):
-- inst_aLcdBkpPwrCnt_a0_a = DFFEAS(inst_aadd_a111 & (inst_areduce_nor_a32 # inst_aLcdBkpPwrCnt_a0_a # !inst_aLcdBkpPwrCnt_a5_a), GLOBAL(Clk10K_acombout), VCC, , , , , , )

-- pragma translate_off
GENERIC MAP (
	operation_mode => "normal",
	synch_mode => "off",
	register_cascade_mode => "off",
	sum_lutc_input => "datac",
	lut_mask => "C8CC",
	output_mode => "reg_only")
-- pragma translate_on
PORT MAP (
	clk => Clk10K_acombout,
	dataa => inst_areduce_nor_a32,
	datab => inst_aadd_a111,
	datac => inst_aLcdBkpPwrCnt_a0_a,
	datad => inst_aLcdBkpPwrCnt_a5_a,
	aclr => GND,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	regout => inst_aLcdBkpPwrCnt_a0_a);

inst_aadd_a106_I : maxii_lcell
-- Equation(s):
-- inst_aadd_a106 = inst_aLcdBkpPwrCnt_a1_a $ inst_aadd_a113
-- inst_aadd_a108 = CARRY(!inst_aadd_a113 # !inst_aLcdBkpPwrCnt_a1_a)
-- inst_aadd_a108COUT1_123 = CARRY(!inst_aadd_a113COUT1_122 # !inst_aLcdBkpPwrCnt_a1_a)

-- pragma translate_off
GENERIC MAP (
	operation_mode => "arithmetic",
	synch_mode => "off",
	register_cascade_mode => "off",
	sum_lutc_input => "cin",
	lut_mask => "3C3F",
	cin0_used => "true",
	cin1_used => "true",
	output_mode => "comb_only")
-- pragma translate_on
PORT MAP (
	datab => inst_aLcdBkpPwrCnt_a1_a,
	cin0 => inst_aadd_a113,
	cin1 => inst_aadd_a113COUT1_122,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	combout => inst_aadd_a106,
	cout0 => inst_aadd_a108,
	cout1 => inst_aadd_a108COUT1_123);

inst_aLcdBkpPwrCnt_a1_a_aI : maxii_lcell
-- Equation(s):
-- inst_aLcdBkpPwrCnt_a1_a = DFFEAS(inst_aadd_a106 & (inst_areduce_nor_a32 # inst_aLcdBkpPwrCnt_a0_a # !inst_aLcdBkpPwrCnt_a5_a), GLOBAL(Clk10K_acombout), VCC, , , , , , )

-- pragma translate_off
GENERIC MAP (
	operation_mode => "normal",
	synch_mode => "off",
	register_cascade_mode => "off",
	sum_lutc_input => "datac",
	lut_mask => "C8CC",
	output_mode => "reg_only")
-- pragma translate_on
PORT MAP (
	clk => Clk10K_acombout,
	dataa => inst_areduce_nor_a32,
	datab => inst_aadd_a106,
	datac => inst_aLcdBkpPwrCnt_a0_a,
	datad => inst_aLcdBkpPwrCnt_a5_a,
	aclr => GND,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	regout => inst_aLcdBkpPwrCnt_a1_a);

inst_aadd_a96_I : maxii_lcell
-- Equation(s):
-- inst_aadd_a96 = inst_aLcdBkpPwrCnt_a2_a $ (!inst_aadd_a108)
-- inst_aadd_a98 = CARRY(inst_aLcdBkpPwrCnt_a2_a & (!inst_aadd_a108))
-- inst_aadd_a98COUT1 = CARRY(inst_aLcdBkpPwrCnt_a2_a & (!inst_aadd_a108COUT1_123))

-- pragma translate_off
GENERIC MAP (
	operation_mode => "arithmetic",
	synch_mode => "off",
	register_cascade_mode => "off",
	sum_lutc_input => "cin",
	lut_mask => "A50A",
	cin0_used => "true",
	cin1_used => "true",
	output_mode => "comb_only")
-- pragma translate_on
PORT MAP (
	dataa => inst_aLcdBkpPwrCnt_a2_a,
	cin0 => inst_aadd_a108,
	cin1 => inst_aadd_a108COUT1_123,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	combout => inst_aadd_a96,
	cout0 => inst_aadd_a98,
	cout1 => inst_aadd_a98COUT1);

inst_aLcdBkpPwrCnt_a2_a_aI : maxii_lcell
-- Equation(s):
-- inst_aLcdBkpPwrCnt_a2_a = DFFEAS(GND, GLOBAL(Clk10K_acombout), VCC, , , inst_aadd_a96, , , VCC)

-- pragma translate_off
GENERIC MAP (
	operation_mode => "normal",
	synch_mode => "on",
	register_cascade_mode => "off",
	sum_lutc_input => "datac",
	lut_mask => "0000",
	output_mode => "reg_only")
-- pragma translate_on
PORT MAP (
	clk => Clk10K_acombout,
	datac => inst_aadd_a96,
	aclr => GND,
	sload => VCC,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	regout => inst_aLcdBkpPwrCnt_a2_a);

inst_aadd_a91_I : maxii_lcell
-- Equation(s):
-- inst_aadd_a91 = inst_aLcdBkpPwrCnt_a3_a $ inst_aadd_a98
-- inst_aadd_a93 = 

-- pragma translate_off
GENERIC MAP (
	operation_mode => "arithmetic",
	synch_mode => "off",
	register_cascade_mode => "off",
	sum_lutc_input => "cin",
	lut_mask => "3C3F",
	cin0_used => "true",
	cin1_used => "true",
	output_mode => "comb_only")
-- pragma translate_on
PORT MAP (
	datab => inst_aLcdBkpPwrCnt_a3_a,
	cin0 => inst_aadd_a98,
	cin1 => inst_aadd_a98COUT1,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	combout => inst_aadd_a91,
	cout => inst_aadd_a93);

inst_aLcdBkpPwrCnt_a3_a_aI : maxii_lcell
-- Equation(s):
-- inst_areduce_nor_a32 = inst_aLcdBkpPwrCnt_a2_a # B1_LcdBkpPwrCnt[3] # !inst_aLcdBkpPwrCnt_a1_a # !inst_aLcdBkpPwrCnt_a4_a
-- inst_aLcdBkpPwrCnt_a3_a = DFFEAS(inst_areduce_nor_a32, GLOBAL(Clk10K_acombout), VCC, , , inst_aadd_a91, , , VCC)

-- pragma translate_off
GENERIC MAP (
	operation_mode => "normal",
	synch_mode => "on",
	register_cascade_mode => "off",
	sum_lutc_input => "qfbk",
	lut_mask => "FBFF",
	output_mode => "reg_and_comb")
-- pragma translate_on
PORT MAP (
	clk => Clk10K_acombout,
	dataa => inst_aLcdBkpPwrCnt_a2_a,
	datab => inst_aLcdBkpPwrCnt_a4_a,
	datac => inst_aadd_a91,
	datad => inst_aLcdBkpPwrCnt_a1_a,
	aclr => GND,
	sload => VCC,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	combout => inst_areduce_nor_a32,
	regout => inst_aLcdBkpPwrCnt_a3_a);

inst_aadd_a101_I : maxii_lcell
-- Equation(s):
-- inst_aadd_a101 = inst_aLcdBkpPwrCnt_a4_a $ !(!inst_aadd_a93 & GND) # (inst_aadd_a93 & VCC)
-- inst_aadd_a103 = CARRY(inst_aLcdBkpPwrCnt_a4_a & !inst_aadd_a93)
-- inst_aadd_a103COUT1_124 = CARRY(inst_aLcdBkpPwrCnt_a4_a & !inst_aadd_a93)

-- pragma translate_off
GENERIC MAP (
	operation_mode => "arithmetic",
	synch_mode => "off",
	register_cascade_mode => "off",
	sum_lutc_input => "cin",
	lut_mask => "C30C",
	cin_used => "true",
	output_mode => "comb_only")
-- pragma translate_on
PORT MAP (
	datab => inst_aLcdBkpPwrCnt_a4_a,
	cin => inst_aadd_a93,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	combout => inst_aadd_a101,
	cout0 => inst_aadd_a103,
	cout1 => inst_aadd_a103COUT1_124);

inst_aLcdBkpPwrCnt_a4_a_aI : maxii_lcell
-- Equation(s):
-- inst_aLcdBkpPwrCnt_a4_a = DFFEAS(inst_aadd_a101 & (inst_areduce_nor_a32 # inst_aLcdBkpPwrCnt_a0_a # !inst_aLcdBkpPwrCnt_a5_a), GLOBAL(Clk10K_acombout), VCC, , , , , , )

-- pragma translate_off
GENERIC MAP (
	operation_mode => "normal",
	synch_mode => "off",
	register_cascade_mode => "off",
	sum_lutc_input => "datac",
	lut_mask => "E0F0",
	output_mode => "reg_only")
-- pragma translate_on
PORT MAP (
	clk => Clk10K_acombout,
	dataa => inst_areduce_nor_a32,
	datab => inst_aLcdBkpPwrCnt_a0_a,
	datac => inst_aadd_a101,
	datad => inst_aLcdBkpPwrCnt_a5_a,
	aclr => GND,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	regout => inst_aLcdBkpPwrCnt_a4_a);

inst_aadd_a116_I : maxii_lcell
-- Equation(s):
-- inst_aadd_a116 = (!inst_aadd_a93 & inst_aadd_a103) # (inst_aadd_a93 & inst_aadd_a103COUT1_124) $ inst_aLcdBkpPwrCnt_a5_a

-- pragma translate_off
GENERIC MAP (
	operation_mode => "normal",
	synch_mode => "off",
	register_cascade_mode => "off",
	sum_lutc_input => "cin",
	lut_mask => "0FF0",
	cin_used => "true",
	cin0_used => "true",
	cin1_used => "true",
	output_mode => "comb_only")
-- pragma translate_on
PORT MAP (
	datad => inst_aLcdBkpPwrCnt_a5_a,
	cin => inst_aadd_a93,
	cin0 => inst_aadd_a103,
	cin1 => inst_aadd_a103COUT1_124,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	combout => inst_aadd_a116);

inst_aLcdBkpPwrCnt_a5_a_aI : maxii_lcell
-- Equation(s):
-- inst_aLcdBkpPwrCnt_a5_a = DFFEAS(inst_aadd_a116 & (inst_areduce_nor_a32 # inst_aLcdBkpPwrCnt_a0_a # !inst_aLcdBkpPwrCnt_a5_a), GLOBAL(Clk10K_acombout), VCC, , , , , , )

-- pragma translate_off
GENERIC MAP (
	operation_mode => "normal",
	synch_mode => "off",
	register_cascade_mode => "off",
	sum_lutc_input => "datac",
	lut_mask => "CC8C",
	output_mode => "reg_only")
-- pragma translate_on
PORT MAP (
	clk => Clk10K_acombout,
	dataa => inst_areduce_nor_a32,
	datab => inst_aadd_a116,
	datac => inst_aLcdBkpPwrCnt_a5_a,
	datad => inst_aLcdBkpPwrCnt_a0_a,
	aclr => GND,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	regout => inst_aLcdBkpPwrCnt_a5_a);

inst_areduce_nor_a4_I : maxii_lcell
-- Equation(s):
-- inst_areduce_nor_a4 = inst_aLcdBkpPwrCnt_a5_a & !inst_aLcdBkpPwrCnt_a0_a & (!inst_areduce_nor_a32)

-- pragma translate_off
GENERIC MAP (
	operation_mode => "normal",
	synch_mode => "off",
	register_cascade_mode => "off",
	sum_lutc_input => "datac",
	lut_mask => "0022",
	output_mode => "comb_only")
-- pragma translate_on
PORT MAP (
	dataa => inst_aLcdBkpPwrCnt_a5_a,
	datab => inst_aLcdBkpPwrCnt_a0_a,
	datad => inst_areduce_nor_a32,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	combout => inst_areduce_nor_a4);

inst_aLcdPWMCache_aI : maxii_lcell
-- Equation(s):
-- inst_aLcdPWMCache = DFFEAS(!inst_aLcdPWMCache, GLOBAL(Clk10K_acombout), VCC, , inst_areduce_nor_a4, , , , )

-- pragma translate_off
GENERIC MAP (
	operation_mode => "normal",
	synch_mode => "off",
	register_cascade_mode => "off",
	sum_lutc_input => "datac",
	lut_mask => "00FF",
	output_mode => "reg_only")
-- pragma translate_on
PORT MAP (
	clk => Clk10K_acombout,
	datad => inst_aLcdPWMCache,
	aclr => GND,
	ena => inst_areduce_nor_a4,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	regout => inst_aLcdPWMCache);

inst5_aadd_a161_I : maxii_lcell
-- Equation(s):
-- inst5_aadd_a161 = !inst5_aLcdHSCnt_a0_a
-- inst5_aadd_a163 = CARRY(inst5_aLcdHSCnt_a0_a)
-- inst5_aadd_a163COUT1_202 = CARRY(inst5_aLcdHSCnt_a0_a)

-- pragma translate_off
GENERIC MAP (
	operation_mode => "arithmetic",
	synch_mode => "off",
	register_cascade_mode => "off",
	sum_lutc_input => "datac",
	lut_mask => "33CC",
	output_mode => "comb_only")
-- pragma translate_on
PORT MAP (
	datab => inst5_aLcdHSCnt_a0_a,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	combout => inst5_aadd_a161,
	cout0 => inst5_aadd_a163,
	cout1 => inst5_aadd_a163COUT1_202);

inst5_aadd_a156_I : maxii_lcell
-- Equation(s):
-- inst5_aadd_a156 = inst5_aLcdHSCnt_a1_a $ inst5_aadd_a163
-- inst5_aadd_a158 = CARRY(!inst5_aadd_a163 # !inst5_aLcdHSCnt_a1_a)
-- inst5_aadd_a158COUT1_203 = CARRY(!inst5_aadd_a163COUT1_202 # !inst5_aLcdHSCnt_a1_a)

-- pragma translate_off
GENERIC MAP (
	operation_mode => "arithmetic",
	synch_mode => "off",
	register_cascade_mode => "off",
	sum_lutc_input => "cin",
	lut_mask => "3C3F",
	cin0_used => "true",
	cin1_used => "true",
	output_mode => "comb_only")
-- pragma translate_on
PORT MAP (
	datab => inst5_aLcdHSCnt_a1_a,
	cin0 => inst5_aadd_a163,
	cin1 => inst5_aadd_a163COUT1_202,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	combout => inst5_aadd_a156,
	cout0 => inst5_aadd_a158,
	cout1 => inst5_aadd_a158COUT1_203);

inst5_aadd_a151_I : maxii_lcell
-- Equation(s):
-- inst5_aadd_a151 = inst5_aLcdHSCnt_a2_a $ !inst5_aadd_a158
-- inst5_aadd_a153 = CARRY(inst5_aLcdHSCnt_a2_a & !inst5_aadd_a158)
-- inst5_aadd_a153COUT1_204 = CARRY(inst5_aLcdHSCnt_a2_a & !inst5_aadd_a158COUT1_203)

-- pragma translate_off
GENERIC MAP (
	operation_mode => "arithmetic",
	synch_mode => "off",
	register_cascade_mode => "off",
	sum_lutc_input => "cin",
	lut_mask => "C30C",
	cin0_used => "true",
	cin1_used => "true",
	output_mode => "comb_only")
-- pragma translate_on
PORT MAP (
	datab => inst5_aLcdHSCnt_a2_a,
	cin0 => inst5_aadd_a158,
	cin1 => inst5_aadd_a158COUT1_203,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	combout => inst5_aadd_a151,
	cout0 => inst5_aadd_a153,
	cout1 => inst5_aadd_a153COUT1_204);

inst5_aLcdHSCnt_a2_a_aI : maxii_lcell
-- Equation(s):
-- inst5_areduce_nor_a1432 = !inst5_aLcdHSCnt_a1_a & (!D1_LcdHSCnt[2] & !inst5_aLcdHSCnt_a0_a)
-- inst5_aLcdHSCnt_a2_a = DFFEAS(inst5_areduce_nor_a1432, GLOBAL(Clk25M_acombout), VCC, , , inst5_aadd_a151, , , VCC)

-- pragma translate_off
GENERIC MAP (
	operation_mode => "normal",
	synch_mode => "on",
	register_cascade_mode => "off",
	sum_lutc_input => "qfbk",
	lut_mask => "0005",
	output_mode => "reg_and_comb")
-- pragma translate_on
PORT MAP (
	clk => Clk25M_acombout,
	dataa => inst5_aLcdHSCnt_a1_a,
	datac => inst5_aadd_a151,
	datad => inst5_aLcdHSCnt_a0_a,
	aclr => GND,
	sload => VCC,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	combout => inst5_areduce_nor_a1432,
	regout => inst5_aLcdHSCnt_a2_a);

inst5_aLcdHSCnt_a0_a_aI : maxii_lcell
-- Equation(s):
-- inst5_aLcdHSCnt_a0_a = DFFEAS(inst5_aadd_a161 & (!inst5_areduce_nor_a1432 # !inst5_areduce_nor_a1436 # !inst5_areduce_nor_a1437), GLOBAL(Clk25M_acombout), VCC, , , , , , )

-- pragma translate_off
GENERIC MAP (
	operation_mode => "normal",
	synch_mode => "off",
	register_cascade_mode => "off",
	sum_lutc_input => "datac",
	lut_mask => "7F00",
	output_mode => "reg_only")
-- pragma translate_on
PORT MAP (
	clk => Clk25M_acombout,
	dataa => inst5_areduce_nor_a1437,
	datab => inst5_areduce_nor_a1436,
	datac => inst5_areduce_nor_a1432,
	datad => inst5_aadd_a161,
	aclr => GND,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	regout => inst5_aLcdHSCnt_a0_a);

inst5_aLcdHSCnt_a1_a_aI : maxii_lcell
-- Equation(s):
-- inst5_aLcdHSCnt_a1_a = DFFEAS(GND, GLOBAL(Clk25M_acombout), VCC, , , inst5_aadd_a156, , , VCC)

-- pragma translate_off
GENERIC MAP (
	operation_mode => "normal",
	synch_mode => "on",
	register_cascade_mode => "off",
	sum_lutc_input => "datac",
	lut_mask => "0000",
	output_mode => "reg_only")
-- pragma translate_on
PORT MAP (
	clk => Clk25M_acombout,
	datac => inst5_aadd_a156,
	aclr => GND,
	sload => VCC,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	regout => inst5_aLcdHSCnt_a1_a);

inst5_aadd_a171_I : maxii_lcell
-- Equation(s):
-- inst5_aadd_a171 = inst5_aLcdHSCnt_a3_a $ (inst5_aadd_a153)
-- inst5_aadd_a173 = CARRY(!inst5_aadd_a153 # !inst5_aLcdHSCnt_a3_a)
-- inst5_aadd_a173COUT1_205 = CARRY(!inst5_aadd_a153COUT1_204 # !inst5_aLcdHSCnt_a3_a)

-- pragma translate_off
GENERIC MAP (
	operation_mode => "arithmetic",
	synch_mode => "off",
	register_cascade_mode => "off",
	sum_lutc_input => "cin",
	lut_mask => "5A5F",
	cin0_used => "true",
	cin1_used => "true",
	output_mode => "comb_only")
-- pragma translate_on
PORT MAP (
	dataa => inst5_aLcdHSCnt_a3_a,
	cin0 => inst5_aadd_a153,
	cin1 => inst5_aadd_a153COUT1_204,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	combout => inst5_aadd_a171,
	cout0 => inst5_aadd_a173,
	cout1 => inst5_aadd_a173COUT1_205);

inst5_aadd_a176_I : maxii_lcell
-- Equation(s):
-- inst5_aadd_a176 = inst5_aLcdHSCnt_a4_a $ (!inst5_aadd_a173)
-- inst5_aadd_a178 = CARRY(inst5_aLcdHSCnt_a4_a & (!inst5_aadd_a173COUT1_205))

-- pragma translate_off
GENERIC MAP (
	operation_mode => "arithmetic",
	synch_mode => "off",
	register_cascade_mode => "off",
	sum_lutc_input => "cin",
	lut_mask => "A50A",
	cin0_used => "true",
	cin1_used => "true",
	output_mode => "comb_only")
-- pragma translate_on
PORT MAP (
	dataa => inst5_aLcdHSCnt_a4_a,
	cin0 => inst5_aadd_a173,
	cin1 => inst5_aadd_a173COUT1_205,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	combout => inst5_aadd_a176,
	cout => inst5_aadd_a178);

inst5_aadd_a191_I : maxii_lcell
-- Equation(s):
-- inst5_aadd_a191 = inst5_aLcdHSCnt_a5_a $ (inst5_aadd_a178)
-- inst5_aadd_a193 = CARRY(!inst5_aadd_a178 # !inst5_aLcdHSCnt_a5_a)
-- inst5_aadd_a193COUT1_206 = CARRY(!inst5_aadd_a178 # !inst5_aLcdHSCnt_a5_a)

-- pragma translate_off
GENERIC MAP (
	operation_mode => "arithmetic",
	synch_mode => "off",
	register_cascade_mode => "off",
	sum_lutc_input => "cin",
	lut_mask => "5A5F",
	cin_used => "true",
	output_mode => "comb_only")
-- pragma translate_on
PORT MAP (
	dataa => inst5_aLcdHSCnt_a5_a,
	cin => inst5_aadd_a178,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	combout => inst5_aadd_a191,
	cout0 => inst5_aadd_a193,
	cout1 => inst5_aadd_a193COUT1_206);

inst5_aadd_a166_I : maxii_lcell
-- Equation(s):
-- inst5_aadd_a166 = inst5_aLcdHSCnt_a6_a $ !(!inst5_aadd_a178 & inst5_aadd_a193) # (inst5_aadd_a178 & inst5_aadd_a193COUT1_206)
-- inst5_aadd_a168 = CARRY(inst5_aLcdHSCnt_a6_a & !inst5_aadd_a193)
-- inst5_aadd_a168COUT1_207 = CARRY(inst5_aLcdHSCnt_a6_a & !inst5_aadd_a193COUT1_206)

-- pragma translate_off
GENERIC MAP (
	operation_mode => "arithmetic",
	synch_mode => "off",
	register_cascade_mode => "off",
	sum_lutc_input => "cin",
	lut_mask => "C30C",
	cin_used => "true",
	cin0_used => "true",
	cin1_used => "true",
	output_mode => "comb_only")
-- pragma translate_on
PORT MAP (
	datab => inst5_aLcdHSCnt_a6_a,
	cin => inst5_aadd_a178,
	cin0 => inst5_aadd_a193,
	cin1 => inst5_aadd_a193COUT1_206,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	combout => inst5_aadd_a166,
	cout0 => inst5_aadd_a168,
	cout1 => inst5_aadd_a168COUT1_207);

inst5_aLcdHSCnt_a6_a_aI : maxii_lcell
-- Equation(s):
-- inst5_areduce_nor_a1437 = !inst5_aLcdHSCnt_a4_a & inst5_aLcdHSCnt_a7_a & !D1_LcdHSCnt[6] & !inst5_aLcdHSCnt_a3_a
-- inst5_aLcdHSCnt_a6_a = DFFEAS(inst5_areduce_nor_a1437, GLOBAL(Clk25M_acombout), VCC, , , inst5_aadd_a166, , , VCC)

-- pragma translate_off
GENERIC MAP (
	operation_mode => "normal",
	synch_mode => "on",
	register_cascade_mode => "off",
	sum_lutc_input => "qfbk",
	lut_mask => "0004",
	output_mode => "reg_and_comb")
-- pragma translate_on
PORT MAP (
	clk => Clk25M_acombout,
	dataa => inst5_aLcdHSCnt_a4_a,
	datab => inst5_aLcdHSCnt_a7_a,
	datac => inst5_aadd_a166,
	datad => inst5_aLcdHSCnt_a3_a,
	aclr => GND,
	sload => VCC,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	combout => inst5_areduce_nor_a1437,
	regout => inst5_aLcdHSCnt_a6_a);

inst5_aadd_a181_I : maxii_lcell
-- Equation(s):
-- inst5_aadd_a181 = inst5_aLcdHSCnt_a7_a $ ((!inst5_aadd_a178 & inst5_aadd_a168) # (inst5_aadd_a178 & inst5_aadd_a168COUT1_207))
-- inst5_aadd_a183 = CARRY(!inst5_aadd_a168 # !inst5_aLcdHSCnt_a7_a)
-- inst5_aadd_a183COUT1_208 = CARRY(!inst5_aadd_a168COUT1_207 # !inst5_aLcdHSCnt_a7_a)

-- pragma translate_off
GENERIC MAP (
	operation_mode => "arithmetic",
	synch_mode => "off",
	register_cascade_mode => "off",
	sum_lutc_input => "cin",
	lut_mask => "5A5F",
	cin_used => "true",
	cin0_used => "true",
	cin1_used => "true",
	output_mode => "comb_only")
-- pragma translate_on
PORT MAP (
	dataa => inst5_aLcdHSCnt_a7_a,
	cin => inst5_aadd_a178,
	cin0 => inst5_aadd_a168,
	cin1 => inst5_aadd_a168COUT1_207,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	combout => inst5_aadd_a181,
	cout0 => inst5_aadd_a183,
	cout1 => inst5_aadd_a183COUT1_208);

inst5_aadd_a186_I : maxii_lcell
-- Equation(s):
-- inst5_aadd_a186 = inst5_aLcdHSCnt_a8_a $ !(!inst5_aadd_a178 & inst5_aadd_a183) # (inst5_aadd_a178 & inst5_aadd_a183COUT1_208)
-- inst5_aadd_a188 = CARRY(inst5_aLcdHSCnt_a8_a & !inst5_aadd_a183)
-- inst5_aadd_a188COUT1_209 = CARRY(inst5_aLcdHSCnt_a8_a & !inst5_aadd_a183COUT1_208)

-- pragma translate_off
GENERIC MAP (
	operation_mode => "arithmetic",
	synch_mode => "off",
	register_cascade_mode => "off",
	sum_lutc_input => "cin",
	lut_mask => "C30C",
	cin_used => "true",
	cin0_used => "true",
	cin1_used => "true",
	output_mode => "comb_only")
-- pragma translate_on
PORT MAP (
	datab => inst5_aLcdHSCnt_a8_a,
	cin => inst5_aadd_a178,
	cin0 => inst5_aadd_a183,
	cin1 => inst5_aadd_a183COUT1_208,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	combout => inst5_aadd_a186,
	cout0 => inst5_aadd_a188,
	cout1 => inst5_aadd_a188COUT1_209);

inst5_aLcdHSCnt_a8_a_aI : maxii_lcell
-- Equation(s):
-- inst5_aLcdHSCnt_a8_a = DFFEAS(inst5_aadd_a186 & (!inst5_areduce_nor_a1432 # !inst5_areduce_nor_a1436 # !inst5_areduce_nor_a1437), GLOBAL(Clk25M_acombout), VCC, , , , , , )

-- pragma translate_off
GENERIC MAP (
	operation_mode => "normal",
	synch_mode => "off",
	register_cascade_mode => "off",
	sum_lutc_input => "datac",
	lut_mask => "4CCC",
	output_mode => "reg_only")
-- pragma translate_on
PORT MAP (
	clk => Clk25M_acombout,
	dataa => inst5_areduce_nor_a1437,
	datab => inst5_aadd_a186,
	datac => inst5_areduce_nor_a1436,
	datad => inst5_areduce_nor_a1432,
	aclr => GND,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	regout => inst5_aLcdHSCnt_a8_a);

inst5_aadd_a196_I : maxii_lcell
-- Equation(s):
-- inst5_aadd_a196 = (!inst5_aadd_a178 & inst5_aadd_a188) # (inst5_aadd_a178 & inst5_aadd_a188COUT1_209) $ inst5_aLcdHSCnt_a9_a

-- pragma translate_off
GENERIC MAP (
	operation_mode => "normal",
	synch_mode => "off",
	register_cascade_mode => "off",
	sum_lutc_input => "cin",
	lut_mask => "0FF0",
	cin_used => "true",
	cin0_used => "true",
	cin1_used => "true",
	output_mode => "comb_only")
-- pragma translate_on
PORT MAP (
	datad => inst5_aLcdHSCnt_a9_a,
	cin => inst5_aadd_a178,
	cin0 => inst5_aadd_a188,
	cin1 => inst5_aadd_a188COUT1_209,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	combout => inst5_aadd_a196);

inst5_aLcdHSCnt_a9_a_aI : maxii_lcell
-- Equation(s):
-- inst5_aLcdHSCnt_a9_a = DFFEAS(inst5_aadd_a196 & (!inst5_areduce_nor_a1432 # !inst5_areduce_nor_a1437 # !inst5_areduce_nor_a1436), GLOBAL(Clk25M_acombout), VCC, , , , , , )

-- pragma translate_off
GENERIC MAP (
	operation_mode => "normal",
	synch_mode => "off",
	register_cascade_mode => "off",
	sum_lutc_input => "datac",
	lut_mask => "4CCC",
	output_mode => "reg_only")
-- pragma translate_on
PORT MAP (
	clk => Clk25M_acombout,
	dataa => inst5_areduce_nor_a1436,
	datab => inst5_aadd_a196,
	datac => inst5_areduce_nor_a1437,
	datad => inst5_areduce_nor_a1432,
	aclr => GND,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	regout => inst5_aLcdHSCnt_a9_a);

inst5_areduce_nor_a1436_I : maxii_lcell
-- Equation(s):
-- inst5_areduce_nor_a1436 = inst5_aLcdHSCnt_a5_a & (inst5_aLcdHSCnt_a8_a & inst5_aLcdHSCnt_a9_a)

-- pragma translate_off
GENERIC MAP (
	operation_mode => "normal",
	synch_mode => "off",
	register_cascade_mode => "off",
	sum_lutc_input => "datac",
	lut_mask => "A000",
	output_mode => "comb_only")
-- pragma translate_on
PORT MAP (
	dataa => inst5_aLcdHSCnt_a5_a,
	datac => inst5_aLcdHSCnt_a8_a,
	datad => inst5_aLcdHSCnt_a9_a,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	combout => inst5_areduce_nor_a1436);

inst5_aLcdHSCnt_a7_a_aI : maxii_lcell
-- Equation(s):
-- inst5_aLcdHSCnt_a7_a = DFFEAS(inst5_aadd_a181 & (!inst5_areduce_nor_a1432 # !inst5_areduce_nor_a1436 # !inst5_areduce_nor_a1437), GLOBAL(Clk25M_acombout), VCC, , , , , , )

-- pragma translate_off
GENERIC MAP (
	operation_mode => "normal",
	synch_mode => "off",
	register_cascade_mode => "off",
	sum_lutc_input => "datac",
	lut_mask => "7F00",
	output_mode => "reg_only")
-- pragma translate_on
PORT MAP (
	clk => Clk25M_acombout,
	dataa => inst5_areduce_nor_a1437,
	datab => inst5_areduce_nor_a1436,
	datac => inst5_areduce_nor_a1432,
	datad => inst5_aadd_a181,
	aclr => GND,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	regout => inst5_aLcdHSCnt_a7_a);

inst5_aLcdHSCnt_a5_a_aI : maxii_lcell
-- Equation(s):
-- inst5_aLcdHSCnt_a5_a = DFFEAS(inst5_aadd_a191 & (!inst5_areduce_nor_a1432 # !inst5_areduce_nor_a1436 # !inst5_areduce_nor_a1437), GLOBAL(Clk25M_acombout), VCC, , , , , , )

-- pragma translate_off
GENERIC MAP (
	operation_mode => "normal",
	synch_mode => "off",
	register_cascade_mode => "off",
	sum_lutc_input => "datac",
	lut_mask => "4CCC",
	output_mode => "reg_only")
-- pragma translate_on
PORT MAP (
	clk => Clk25M_acombout,
	dataa => inst5_areduce_nor_a1437,
	datab => inst5_aadd_a191,
	datac => inst5_areduce_nor_a1436,
	datad => inst5_areduce_nor_a1432,
	aclr => GND,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	regout => inst5_aLcdHSCnt_a5_a);

inst5_aLcdHSCnt_a3_a_aI : maxii_lcell
-- Equation(s):
-- inst5_areduce_nor_a1443 = !inst5_aLcdHSCnt_a8_a & (inst5_aLcdHSCnt_a5_a & !D1_LcdHSCnt[3] & !inst5_aLcdHSCnt_a6_a # !inst5_aLcdHSCnt_a5_a & D1_LcdHSCnt[3] & inst5_aLcdHSCnt_a6_a)
-- inst5_aLcdHSCnt_a3_a = DFFEAS(inst5_areduce_nor_a1443, GLOBAL(Clk25M_acombout), VCC, , , inst5_aadd_a171, , , VCC)

-- pragma translate_off
GENERIC MAP (
	operation_mode => "normal",
	synch_mode => "on",
	register_cascade_mode => "off",
	sum_lutc_input => "qfbk",
	lut_mask => "1002",
	output_mode => "reg_and_comb")
-- pragma translate_on
PORT MAP (
	clk => Clk25M_acombout,
	dataa => inst5_aLcdHSCnt_a5_a,
	datab => inst5_aLcdHSCnt_a8_a,
	datac => inst5_aadd_a171,
	datad => inst5_aLcdHSCnt_a6_a,
	aclr => GND,
	sload => VCC,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	combout => inst5_areduce_nor_a1443,
	regout => inst5_aLcdHSCnt_a3_a);

inst5_aLcdHSCnt_a4_a_aI : maxii_lcell
-- Equation(s):
-- inst5_areduce_nor_a1433 = D1_LcdHSCnt[4] & !inst5_aLcdHSCnt_a7_a
-- inst5_aLcdHSCnt_a4_a = DFFEAS(inst5_areduce_nor_a1433, GLOBAL(Clk25M_acombout), VCC, , , inst5_aadd_a176, , , VCC)

-- pragma translate_off
GENERIC MAP (
	operation_mode => "normal",
	synch_mode => "on",
	register_cascade_mode => "off",
	sum_lutc_input => "qfbk",
	lut_mask => "00F0",
	output_mode => "reg_and_comb")
-- pragma translate_on
PORT MAP (
	clk => Clk25M_acombout,
	datac => inst5_aadd_a176,
	datad => inst5_aLcdHSCnt_a7_a,
	aclr => GND,
	sload => VCC,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	combout => inst5_areduce_nor_a1433,
	regout => inst5_aLcdHSCnt_a4_a);

inst5_areduce_nor_a1439_I : maxii_lcell
-- Equation(s):
-- inst5_areduce_nor_a1439 = !inst5_aLcdHSCnt_a3_a & !inst5_aLcdHSCnt_a6_a & !inst5_aLcdHSCnt_a8_a & !inst5_aLcdHSCnt_a9_a

-- pragma translate_off
GENERIC MAP (
	operation_mode => "normal",
	synch_mode => "off",
	register_cascade_mode => "off",
	sum_lutc_input => "datac",
	lut_mask => "0001",
	output_mode => "comb_only")
-- pragma translate_on
PORT MAP (
	dataa => inst5_aLcdHSCnt_a3_a,
	datab => inst5_aLcdHSCnt_a6_a,
	datac => inst5_aLcdHSCnt_a8_a,
	datad => inst5_aLcdHSCnt_a9_a,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	combout => inst5_areduce_nor_a1439);

inst5_areduce_nor_a1445_I : maxii_lcell
-- Equation(s):
-- inst5_areduce_nor_a1445 = !inst5_aLcdHSCnt_a4_a & !inst5_aLcdHSCnt_a5_a & !inst5_aLcdHSCnt_a7_a & inst5_areduce_nor_a1439

-- pragma translate_off
GENERIC MAP (
	operation_mode => "normal",
	synch_mode => "off",
	register_cascade_mode => "off",
	sum_lutc_input => "datac",
	lut_mask => "0100",
	output_mode => "comb_only")
-- pragma translate_on
PORT MAP (
	dataa => inst5_aLcdHSCnt_a4_a,
	datab => inst5_aLcdHSCnt_a5_a,
	datac => inst5_aLcdHSCnt_a7_a,
	datad => inst5_areduce_nor_a1439,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	combout => inst5_areduce_nor_a1445);

inst5_areduce_nor_a1444_I : maxii_lcell
-- Equation(s):
-- inst5_areduce_nor_a1444 = inst5_aLcdHSCnt_a4_a & !inst5_aLcdHSCnt_a9_a & inst5_areduce_nor_a1443 & !inst5_aLcdHSCnt_a7_a

-- pragma translate_off
GENERIC MAP (
	operation_mode => "normal",
	synch_mode => "off",
	register_cascade_mode => "off",
	sum_lutc_input => "datac",
	lut_mask => "0020",
	output_mode => "comb_only")
-- pragma translate_on
PORT MAP (
	dataa => inst5_aLcdHSCnt_a4_a,
	datab => inst5_aLcdHSCnt_a9_a,
	datac => inst5_areduce_nor_a1443,
	datad => inst5_aLcdHSCnt_a7_a,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	combout => inst5_areduce_nor_a1444);

inst5_areduce_nor_a1441_I : maxii_lcell
-- Equation(s):
-- inst5_areduce_nor_a1441 = inst5_aLcdHSCnt_a6_a & inst5_aLcdHSCnt_a3_a

-- pragma translate_off
GENERIC MAP (
	operation_mode => "normal",
	synch_mode => "off",
	register_cascade_mode => "off",
	sum_lutc_input => "datac",
	lut_mask => "F000",
	output_mode => "comb_only")
-- pragma translate_on
PORT MAP (
	datac => inst5_aLcdHSCnt_a6_a,
	datad => inst5_aLcdHSCnt_a3_a,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	combout => inst5_areduce_nor_a1441);

inst5_areduce_nor_a1442_I : maxii_lcell
-- Equation(s):
-- inst5_areduce_nor_a1442 = inst5_areduce_nor_a1436 & (inst5_areduce_nor_a1437 # inst5_areduce_nor_a1441 & inst5_areduce_nor_a1433)

-- pragma translate_off
GENERIC MAP (
	operation_mode => "normal",
	synch_mode => "off",
	register_cascade_mode => "off",
	sum_lutc_input => "datac",
	lut_mask => "EC00",
	output_mode => "comb_only")
-- pragma translate_on
PORT MAP (
	dataa => inst5_areduce_nor_a1441,
	datab => inst5_areduce_nor_a1437,
	datac => inst5_areduce_nor_a1433,
	datad => inst5_areduce_nor_a1436,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	combout => inst5_areduce_nor_a1442);

inst5_areduce_nor_a1446_I : maxii_lcell
-- Equation(s):
-- inst5_areduce_nor_a1446 = inst5_areduce_nor_a1432 & (inst5_areduce_nor_a1445 # inst5_areduce_nor_a1444 # inst5_areduce_nor_a1442)

-- pragma translate_off
GENERIC MAP (
	operation_mode => "normal",
	synch_mode => "off",
	register_cascade_mode => "off",
	sum_lutc_input => "datac",
	lut_mask => "FE00",
	output_mode => "comb_only")
-- pragma translate_on
PORT MAP (
	dataa => inst5_areduce_nor_a1445,
	datab => inst5_areduce_nor_a1444,
	datac => inst5_areduce_nor_a1442,
	datad => inst5_areduce_nor_a1432,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	combout => inst5_areduce_nor_a1446);

inst5_areduce_nor_a1440_I : maxii_lcell
-- Equation(s):
-- inst5_areduce_nor_a1440 = inst5_areduce_nor_a1432 & inst5_aLcdHSCnt_a5_a & inst5_areduce_nor_a1433 & inst5_areduce_nor_a1439

-- pragma translate_off
GENERIC MAP (
	operation_mode => "normal",
	synch_mode => "off",
	register_cascade_mode => "off",
	sum_lutc_input => "datac",
	lut_mask => "8000",
	output_mode => "comb_only")
-- pragma translate_on
PORT MAP (
	dataa => inst5_areduce_nor_a1432,
	datab => inst5_aLcdHSCnt_a5_a,
	datac => inst5_areduce_nor_a1433,
	datad => inst5_areduce_nor_a1439,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	combout => inst5_areduce_nor_a1440);

inst5_areduce_nor_a1434_I : maxii_lcell
-- Equation(s):
-- inst5_areduce_nor_a1434 = inst5_aLcdHSCnt_a3_a & inst5_aLcdHSCnt_a6_a & inst5_areduce_nor_a1432 & inst5_areduce_nor_a1433

-- pragma translate_off
GENERIC MAP (
	operation_mode => "normal",
	synch_mode => "off",
	register_cascade_mode => "off",
	sum_lutc_input => "datac",
	lut_mask => "8000",
	output_mode => "comb_only")
-- pragma translate_on
PORT MAP (
	dataa => inst5_aLcdHSCnt_a3_a,
	datab => inst5_aLcdHSCnt_a6_a,
	datac => inst5_areduce_nor_a1432,
	datad => inst5_areduce_nor_a1433,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	combout => inst5_areduce_nor_a1434);

inst5_areduce_nor_a1435_I : maxii_lcell
-- Equation(s):
-- inst5_areduce_nor_a1435 = !inst5_aLcdHSCnt_a5_a & (!inst5_aLcdHSCnt_a8_a & !inst5_aLcdHSCnt_a9_a)

-- pragma translate_off
GENERIC MAP (
	operation_mode => "normal",
	synch_mode => "off",
	register_cascade_mode => "off",
	sum_lutc_input => "datac",
	lut_mask => "0005",
	output_mode => "comb_only")
-- pragma translate_on
PORT MAP (
	dataa => inst5_aLcdHSCnt_a5_a,
	datac => inst5_aLcdHSCnt_a8_a,
	datad => inst5_aLcdHSCnt_a9_a,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	combout => inst5_areduce_nor_a1435);

inst5_areduce_nor_a1438_I : maxii_lcell
-- Equation(s):
-- inst5_areduce_nor_a1438 = inst5_areduce_nor_a1436 & inst5_areduce_nor_a1437 & (inst5_areduce_nor_a1432)

-- pragma translate_off
GENERIC MAP (
	operation_mode => "normal",
	synch_mode => "off",
	register_cascade_mode => "off",
	sum_lutc_input => "datac",
	lut_mask => "8800",
	output_mode => "comb_only")
-- pragma translate_on
PORT MAP (
	dataa => inst5_areduce_nor_a1436,
	datab => inst5_areduce_nor_a1437,
	datad => inst5_areduce_nor_a1432,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	combout => inst5_areduce_nor_a1438);

inst5_aSelect_a244_I : maxii_lcell
-- Equation(s):
-- inst5_aSelect_a244 = inst5_areduce_nor_a1434 & (inst5_areduce_nor_a1435 # inst5_areduce_nor_a1438 & inst5_aLcdDE) # !inst5_areduce_nor_a1434 & (inst5_areduce_nor_a1438 & inst5_aLcdDE)

-- pragma translate_off
GENERIC MAP (
	operation_mode => "normal",
	synch_mode => "off",
	register_cascade_mode => "off",
	sum_lutc_input => "datac",
	lut_mask => "F888",
	output_mode => "comb_only")
-- pragma translate_on
PORT MAP (
	dataa => inst5_areduce_nor_a1434,
	datab => inst5_areduce_nor_a1435,
	datac => inst5_areduce_nor_a1438,
	datad => inst5_aLcdDE,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	combout => inst5_aSelect_a244);

inst5_aLcdDE_aI : maxii_lcell
-- Equation(s):
-- inst5_aLcdDE = DFFEAS(inst5_aSelect_a244 # inst5_aLcdDE & (inst5_areduce_nor_a1440 # !inst5_areduce_nor_a1446), GLOBAL(Clk25M_acombout), VCC, , , , , , )

-- pragma translate_off
GENERIC MAP (
	operation_mode => "normal",
	synch_mode => "off",
	register_cascade_mode => "off",
	sum_lutc_input => "datac",
	lut_mask => "FFA2",
	output_mode => "reg_only")
-- pragma translate_on
PORT MAP (
	clk => Clk25M_acombout,
	dataa => inst5_aLcdDE,
	datab => inst5_areduce_nor_a1446,
	datac => inst5_areduce_nor_a1440,
	datad => inst5_aSelect_a244,
	aclr => GND,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	regout => inst5_aLcdDE);

inst7_aadd_a166_I : maxii_lcell
-- Equation(s):
-- inst7_aadd_a166 = inst7_aLcdVSCnt_a5_a $ inst7_aadd_a173
-- inst7_aadd_a168 = CARRY(!inst7_aadd_a173 # !inst7_aLcdVSCnt_a5_a)
-- inst7_aadd_a168COUT1_206 = CARRY(!inst7_aadd_a173 # !inst7_aLcdVSCnt_a5_a)

-- pragma translate_off
GENERIC MAP (
	operation_mode => "arithmetic",
	synch_mode => "off",
	register_cascade_mode => "off",
	sum_lutc_input => "cin",
	lut_mask => "3C3F",
	cin_used => "true",
	output_mode => "comb_only")
-- pragma translate_on
PORT MAP (
	datab => inst7_aLcdVSCnt_a5_a,
	cin => inst7_aadd_a173,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	combout => inst7_aadd_a166,
	cout0 => inst7_aadd_a168,
	cout1 => inst7_aadd_a168COUT1_206);

inst7_aLcdVSCnt_a5_a_aI : maxii_lcell
-- Equation(s):
-- inst7_aLcdVSCnt_a5_a = DFFEAS(inst7_aadd_a166, GLOBAL(inst5_aLcdHS), VCC, , , , , , )

-- pragma translate_off
GENERIC MAP (
	operation_mode => "normal",
	synch_mode => "off",
	register_cascade_mode => "off",
	sum_lutc_input => "datac",
	lut_mask => "FF00",
	output_mode => "reg_only")
-- pragma translate_on
PORT MAP (
	clk => inst5_aLcdHS,
	datad => inst7_aadd_a166,
	aclr => GND,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	regout => inst7_aLcdVSCnt_a5_a);

inst7_aadd_a161_I : maxii_lcell
-- Equation(s):
-- inst7_aadd_a161 = inst7_aLcdVSCnt_a6_a $ (!(!inst7_aadd_a173 & inst7_aadd_a168) # (inst7_aadd_a173 & inst7_aadd_a168COUT1_206))
-- inst7_aadd_a163 = CARRY(inst7_aLcdVSCnt_a6_a & (!inst7_aadd_a168))
-- inst7_aadd_a163COUT1_207 = CARRY(inst7_aLcdVSCnt_a6_a & (!inst7_aadd_a168COUT1_206))

-- pragma translate_off
GENERIC MAP (
	operation_mode => "arithmetic",
	synch_mode => "off",
	register_cascade_mode => "off",
	sum_lutc_input => "cin",
	lut_mask => "A50A",
	cin_used => "true",
	cin0_used => "true",
	cin1_used => "true",
	output_mode => "comb_only")
-- pragma translate_on
PORT MAP (
	dataa => inst7_aLcdVSCnt_a6_a,
	cin => inst7_aadd_a173,
	cin0 => inst7_aadd_a168,
	cin1 => inst7_aadd_a168COUT1_206,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	combout => inst7_aadd_a161,
	cout0 => inst7_aadd_a163,
	cout1 => inst7_aadd_a163COUT1_207);

inst7_aLcdVSCnt_a6_a_aI : maxii_lcell
-- Equation(s):
-- inst7_aLcdVSCnt_a6_a = DFFEAS(GND, GLOBAL(inst5_aLcdHS), VCC, , , inst7_aadd_a161, , , VCC)

-- pragma translate_off
GENERIC MAP (
	operation_mode => "normal",
	synch_mode => "on",
	register_cascade_mode => "off",
	sum_lutc_input => "datac",
	lut_mask => "0000",
	output_mode => "reg_only")
-- pragma translate_on
PORT MAP (
	clk => inst5_aLcdHS,
	datac => inst7_aadd_a161,
	aclr => GND,
	sload => VCC,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	regout => inst7_aLcdVSCnt_a6_a);

inst7_aadd_a156_I : maxii_lcell
-- Equation(s):
-- inst7_aadd_a156 = inst7_aLcdVSCnt_a7_a $ ((!inst7_aadd_a173 & inst7_aadd_a163) # (inst7_aadd_a173 & inst7_aadd_a163COUT1_207))
-- inst7_aadd_a158 = CARRY(!inst7_aadd_a163 # !inst7_aLcdVSCnt_a7_a)
-- inst7_aadd_a158COUT1_208 = CARRY(!inst7_aadd_a163COUT1_207 # !inst7_aLcdVSCnt_a7_a)

-- pragma translate_off
GENERIC MAP (
	operation_mode => "arithmetic",
	synch_mode => "off",
	register_cascade_mode => "off",
	sum_lutc_input => "cin",
	lut_mask => "5A5F",
	cin_used => "true",
	cin0_used => "true",
	cin1_used => "true",
	output_mode => "comb_only")
-- pragma translate_on
PORT MAP (
	dataa => inst7_aLcdVSCnt_a7_a,
	cin => inst7_aadd_a173,
	cin0 => inst7_aadd_a163,
	cin1 => inst7_aadd_a163COUT1_207,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	combout => inst7_aadd_a156,
	cout0 => inst7_aadd_a158,
	cout1 => inst7_aadd_a158COUT1_208);

inst7_aLcdVSCnt_a7_a_aI : maxii_lcell
-- Equation(s):
-- inst7_aLcdVSCnt_a7_a = DFFEAS(inst7_aadd_a156, GLOBAL(inst5_aLcdHS), VCC, , , , , , )

-- pragma translate_off
GENERIC MAP (
	operation_mode => "normal",
	synch_mode => "off",
	register_cascade_mode => "off",
	sum_lutc_input => "datac",
	lut_mask => "FF00",
	output_mode => "reg_only")
-- pragma translate_on
PORT MAP (
	clk => inst5_aLcdHS,
	datad => inst7_aadd_a156,
	aclr => GND,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	regout => inst7_aLcdVSCnt_a7_a);

inst7_aLcdVSCnt_a8_a_aI : maxii_lcell
-- Equation(s):
-- inst7_areduce_nor_a1358 = !inst7_aLcdVSCnt_a6_a & !inst7_aLcdVSCnt_a5_a & !E1_LcdVSCnt[8] & !inst7_aLcdVSCnt_a7_a
-- inst7_aLcdVSCnt_a8_a = DFFEAS(inst7_areduce_nor_a1358, GLOBAL(inst5_aLcdHS), VCC, , , inst7_aadd_a151, , , VCC)

-- pragma translate_off
GENERIC MAP (
	operation_mode => "normal",
	synch_mode => "on",
	register_cascade_mode => "off",
	sum_lutc_input => "qfbk",
	lut_mask => "0001",
	output_mode => "reg_and_comb")
-- pragma translate_on
PORT MAP (
	clk => inst5_aLcdHS,
	dataa => inst7_aLcdVSCnt_a6_a,
	datab => inst7_aLcdVSCnt_a5_a,
	datac => inst7_aadd_a151,
	datad => inst7_aLcdVSCnt_a7_a,
	aclr => GND,
	sload => VCC,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	combout => inst7_areduce_nor_a1358,
	regout => inst7_aLcdVSCnt_a8_a);

inst7_aadd_a151_I : maxii_lcell
-- Equation(s):
-- inst7_aadd_a151 = inst7_aLcdVSCnt_a8_a $ (!(!inst7_aadd_a173 & inst7_aadd_a158) # (inst7_aadd_a173 & inst7_aadd_a158COUT1_208))
-- inst7_aadd_a153 = CARRY(inst7_aLcdVSCnt_a8_a & (!inst7_aadd_a158))
-- inst7_aadd_a153COUT1_209 = CARRY(inst7_aLcdVSCnt_a8_a & (!inst7_aadd_a158COUT1_208))

-- pragma translate_off
GENERIC MAP (
	operation_mode => "arithmetic",
	synch_mode => "off",
	register_cascade_mode => "off",
	sum_lutc_input => "cin",
	lut_mask => "A50A",
	cin_used => "true",
	cin0_used => "true",
	cin1_used => "true",
	output_mode => "comb_only")
-- pragma translate_on
PORT MAP (
	dataa => inst7_aLcdVSCnt_a8_a,
	cin => inst7_aadd_a173,
	cin0 => inst7_aadd_a158,
	cin1 => inst7_aadd_a158COUT1_208,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	combout => inst7_aadd_a151,
	cout0 => inst7_aadd_a153,
	cout1 => inst7_aadd_a153COUT1_209);

inst7_aLcdVSCnt_a0_a_aI : maxii_lcell
-- Equation(s):
-- inst7_areduce_nor_a1359 = inst7_aLcdVSCnt_a2_a & inst7_aLcdVSCnt_a3_a & E1_LcdVSCnt[0] & !inst7_aLcdVSCnt_a1_a
-- inst7_aLcdVSCnt_a0_a = DFFEAS(inst7_areduce_nor_a1359, GLOBAL(inst5_aLcdHS), VCC, , , inst7_aadd_a186, , , VCC)

-- pragma translate_off
GENERIC MAP (
	operation_mode => "normal",
	synch_mode => "on",
	register_cascade_mode => "off",
	sum_lutc_input => "qfbk",
	lut_mask => "0080",
	output_mode => "reg_and_comb")
-- pragma translate_on
PORT MAP (
	clk => inst5_aLcdHS,
	dataa => inst7_aLcdVSCnt_a2_a,
	datab => inst7_aLcdVSCnt_a3_a,
	datac => inst7_aadd_a186,
	datad => inst7_aLcdVSCnt_a1_a,
	aclr => GND,
	sload => VCC,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	combout => inst7_areduce_nor_a1359,
	regout => inst7_aLcdVSCnt_a0_a);

inst7_aadd_a186_I : maxii_lcell
-- Equation(s):
-- inst7_aadd_a186 = !inst7_aLcdVSCnt_a0_a
-- inst7_aadd_a188 = CARRY(inst7_aLcdVSCnt_a0_a)
-- inst7_aadd_a188COUT1_202 = CARRY(inst7_aLcdVSCnt_a0_a)

-- pragma translate_off
GENERIC MAP (
	operation_mode => "arithmetic",
	synch_mode => "off",
	register_cascade_mode => "off",
	sum_lutc_input => "datac",
	lut_mask => "55AA",
	output_mode => "comb_only")
-- pragma translate_on
PORT MAP (
	dataa => inst7_aLcdVSCnt_a0_a,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	combout => inst7_aadd_a186,
	cout0 => inst7_aadd_a188,
	cout1 => inst7_aadd_a188COUT1_202);

inst7_areduce_nor_a4_I : maxii_lcell
-- Equation(s):
-- inst7_areduce_nor_a4 = inst7_aLcdVSCnt_a9_a & inst7_areduce_nor_a1359 & inst7_areduce_nor_a1358 & !inst7_aLcdVSCnt_a4_a

-- pragma translate_off
GENERIC MAP (
	operation_mode => "normal",
	synch_mode => "off",
	register_cascade_mode => "off",
	sum_lutc_input => "datac",
	lut_mask => "0080",
	output_mode => "comb_only")
-- pragma translate_on
PORT MAP (
	dataa => inst7_aLcdVSCnt_a9_a,
	datab => inst7_areduce_nor_a1359,
	datac => inst7_areduce_nor_a1358,
	datad => inst7_aLcdVSCnt_a4_a,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	combout => inst7_areduce_nor_a4);

inst7_aadd_a191_I : maxii_lcell
-- Equation(s):
-- inst7_aadd_a191 = inst7_aLcdVSCnt_a1_a $ inst7_aadd_a188
-- inst7_aadd_a193 = CARRY(!inst7_aadd_a188 # !inst7_aLcdVSCnt_a1_a)
-- inst7_aadd_a193COUT1_203 = CARRY(!inst7_aadd_a188COUT1_202 # !inst7_aLcdVSCnt_a1_a)

-- pragma translate_off
GENERIC MAP (
	operation_mode => "arithmetic",
	synch_mode => "off",
	register_cascade_mode => "off",
	sum_lutc_input => "cin",
	lut_mask => "3C3F",
	cin0_used => "true",
	cin1_used => "true",
	output_mode => "comb_only")
-- pragma translate_on
PORT MAP (
	datab => inst7_aLcdVSCnt_a1_a,
	cin0 => inst7_aadd_a188,
	cin1 => inst7_aadd_a188COUT1_202,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	combout => inst7_aadd_a191,
	cout0 => inst7_aadd_a193,
	cout1 => inst7_aadd_a193COUT1_203);

inst7_aLcdVSCnt_a1_a_aI : maxii_lcell
-- Equation(s):
-- inst7_aLcdVSCnt_a1_a = DFFEAS(!inst7_areduce_nor_a4 & (inst7_aadd_a191), GLOBAL(inst5_aLcdHS), VCC, , , , , , )

-- pragma translate_off
GENERIC MAP (
	operation_mode => "normal",
	synch_mode => "off",
	register_cascade_mode => "off",
	sum_lutc_input => "datac",
	lut_mask => "3300",
	output_mode => "reg_only")
-- pragma translate_on
PORT MAP (
	clk => inst5_aLcdHS,
	datab => inst7_areduce_nor_a4,
	datad => inst7_aadd_a191,
	aclr => GND,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	regout => inst7_aLcdVSCnt_a1_a);

inst7_aadd_a176_I : maxii_lcell
-- Equation(s):
-- inst7_aadd_a176 = inst7_aLcdVSCnt_a2_a $ (!inst7_aadd_a193)
-- inst7_aadd_a178 = CARRY(inst7_aLcdVSCnt_a2_a & (!inst7_aadd_a193))
-- inst7_aadd_a178COUT1_204 = CARRY(inst7_aLcdVSCnt_a2_a & (!inst7_aadd_a193COUT1_203))

-- pragma translate_off
GENERIC MAP (
	operation_mode => "arithmetic",
	synch_mode => "off",
	register_cascade_mode => "off",
	sum_lutc_input => "cin",
	lut_mask => "A50A",
	cin0_used => "true",
	cin1_used => "true",
	output_mode => "comb_only")
-- pragma translate_on
PORT MAP (
	dataa => inst7_aLcdVSCnt_a2_a,
	cin0 => inst7_aadd_a193,
	cin1 => inst7_aadd_a193COUT1_203,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	combout => inst7_aadd_a176,
	cout0 => inst7_aadd_a178,
	cout1 => inst7_aadd_a178COUT1_204);

inst7_aLcdVSCnt_a2_a_aI : maxii_lcell
-- Equation(s):
-- inst7_aLcdVSCnt_a2_a = DFFEAS(inst7_aadd_a176 & !inst7_areduce_nor_a4, GLOBAL(inst5_aLcdHS), VCC, , , , , , )

-- pragma translate_off
GENERIC MAP (
	operation_mode => "normal",
	synch_mode => "off",
	register_cascade_mode => "off",
	sum_lutc_input => "datac",
	lut_mask => "00F0",
	output_mode => "reg_only")
-- pragma translate_on
PORT MAP (
	clk => inst5_aLcdHS,
	datac => inst7_aadd_a176,
	datad => inst7_areduce_nor_a4,
	aclr => GND,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	regout => inst7_aLcdVSCnt_a2_a);

inst7_aadd_a181_I : maxii_lcell
-- Equation(s):
-- inst7_aadd_a181 = inst7_aLcdVSCnt_a3_a $ inst7_aadd_a178
-- inst7_aadd_a183 = CARRY(!inst7_aadd_a178 # !inst7_aLcdVSCnt_a3_a)
-- inst7_aadd_a183COUT1_205 = CARRY(!inst7_aadd_a178COUT1_204 # !inst7_aLcdVSCnt_a3_a)

-- pragma translate_off
GENERIC MAP (
	operation_mode => "arithmetic",
	synch_mode => "off",
	register_cascade_mode => "off",
	sum_lutc_input => "cin",
	lut_mask => "3C3F",
	cin0_used => "true",
	cin1_used => "true",
	output_mode => "comb_only")
-- pragma translate_on
PORT MAP (
	datab => inst7_aLcdVSCnt_a3_a,
	cin0 => inst7_aadd_a178,
	cin1 => inst7_aadd_a178COUT1_204,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	combout => inst7_aadd_a181,
	cout0 => inst7_aadd_a183,
	cout1 => inst7_aadd_a183COUT1_205);

inst7_aLcdVSCnt_a3_a_aI : maxii_lcell
-- Equation(s):
-- inst7_aLcdVSCnt_a3_a = DFFEAS(inst7_aadd_a181 & !inst7_areduce_nor_a4, GLOBAL(inst5_aLcdHS), VCC, , , , , , )

-- pragma translate_off
GENERIC MAP (
	operation_mode => "normal",
	synch_mode => "off",
	register_cascade_mode => "off",
	sum_lutc_input => "datac",
	lut_mask => "00F0",
	output_mode => "reg_only")
-- pragma translate_on
PORT MAP (
	clk => inst5_aLcdHS,
	datac => inst7_aadd_a181,
	datad => inst7_areduce_nor_a4,
	aclr => GND,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	regout => inst7_aLcdVSCnt_a3_a);

inst7_aadd_a171_I : maxii_lcell
-- Equation(s):
-- inst7_aadd_a171 = inst7_aLcdVSCnt_a4_a $ !inst7_aadd_a183
-- inst7_aadd_a173 = CARRY(inst7_aLcdVSCnt_a4_a & !inst7_aadd_a183COUT1_205)

-- pragma translate_off
GENERIC MAP (
	operation_mode => "arithmetic",
	synch_mode => "off",
	register_cascade_mode => "off",
	sum_lutc_input => "cin",
	lut_mask => "C30C",
	cin0_used => "true",
	cin1_used => "true",
	output_mode => "comb_only")
-- pragma translate_on
PORT MAP (
	datab => inst7_aLcdVSCnt_a4_a,
	cin0 => inst7_aadd_a183,
	cin1 => inst7_aadd_a183COUT1_205,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	combout => inst7_aadd_a171,
	cout => inst7_aadd_a173);

inst7_aLcdVSCnt_a4_a_aI : maxii_lcell
-- Equation(s):
-- inst7_areduce_nor_a2 = !inst7_aLcdVSCnt_a9_a & inst7_areduce_nor_a1358 & E1_LcdVSCnt[4] & inst7_areduce_nor_a1359
-- inst7_aLcdVSCnt_a4_a = DFFEAS(inst7_areduce_nor_a2, GLOBAL(inst5_aLcdHS), VCC, , , inst7_aadd_a171, , , VCC)

-- pragma translate_off
GENERIC MAP (
	operation_mode => "normal",
	synch_mode => "on",
	register_cascade_mode => "off",
	sum_lutc_input => "qfbk",
	lut_mask => "4000",
	output_mode => "reg_and_comb")
-- pragma translate_on
PORT MAP (
	clk => inst5_aLcdHS,
	dataa => inst7_aLcdVSCnt_a9_a,
	datab => inst7_areduce_nor_a1358,
	datac => inst7_aadd_a171,
	datad => inst7_areduce_nor_a1359,
	aclr => GND,
	sload => VCC,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	combout => inst7_areduce_nor_a2,
	regout => inst7_aLcdVSCnt_a4_a);

inst7_aadd_a196_I : maxii_lcell
-- Equation(s):
-- inst7_aadd_a196 = inst7_aLcdVSCnt_a9_a $ ((!inst7_aadd_a173 & inst7_aadd_a153) # (inst7_aadd_a173 & inst7_aadd_a153COUT1_209))

-- pragma translate_off
GENERIC MAP (
	operation_mode => "normal",
	synch_mode => "off",
	register_cascade_mode => "off",
	sum_lutc_input => "cin",
	lut_mask => "5A5A",
	cin_used => "true",
	cin0_used => "true",
	cin1_used => "true",
	output_mode => "comb_only")
-- pragma translate_on
PORT MAP (
	dataa => inst7_aLcdVSCnt_a9_a,
	cin => inst7_aadd_a173,
	cin0 => inst7_aadd_a153,
	cin1 => inst7_aadd_a153COUT1_209,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	combout => inst7_aadd_a196);

inst7_aLcdVSCnt_a9_a_aI : maxii_lcell
-- Equation(s):
-- inst7_aLcdVSCnt_a9_a = DFFEAS(inst7_aadd_a196 & (!inst7_areduce_nor_a4), GLOBAL(inst5_aLcdHS), VCC, , , , , , )

-- pragma translate_off
GENERIC MAP (
	operation_mode => "normal",
	synch_mode => "off",
	register_cascade_mode => "off",
	sum_lutc_input => "datac",
	lut_mask => "00CC",
	output_mode => "reg_only")
-- pragma translate_on
PORT MAP (
	clk => inst5_aLcdHS,
	datab => inst7_aadd_a196,
	datad => inst7_areduce_nor_a4,
	aclr => GND,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	regout => inst7_aLcdVSCnt_a9_a);

inst7_areduce_nor_a1360_I : maxii_lcell
-- Equation(s):
-- inst7_areduce_nor_a1360 = !inst7_aLcdVSCnt_a2_a & !inst7_aLcdVSCnt_a3_a & inst7_areduce_nor_a1358 & !inst7_aLcdVSCnt_a4_a

-- pragma translate_off
GENERIC MAP (
	operation_mode => "normal",
	synch_mode => "off",
	register_cascade_mode => "off",
	sum_lutc_input => "datac",
	lut_mask => "0010",
	output_mode => "comb_only")
-- pragma translate_on
PORT MAP (
	dataa => inst7_aLcdVSCnt_a2_a,
	datab => inst7_aLcdVSCnt_a3_a,
	datac => inst7_areduce_nor_a1358,
	datad => inst7_aLcdVSCnt_a4_a,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	combout => inst7_areduce_nor_a1360);

inst7_areduce_nor_a1361_I : maxii_lcell
-- Equation(s):
-- inst7_areduce_nor_a1361 = inst7_aLcdVSCnt_a1_a & inst7_aLcdVSCnt_a0_a & !inst7_aLcdVSCnt_a9_a

-- pragma translate_off
GENERIC MAP (
	operation_mode => "normal",
	synch_mode => "off",
	register_cascade_mode => "off",
	sum_lutc_input => "datac",
	lut_mask => "00C0",
	output_mode => "comb_only")
-- pragma translate_on
PORT MAP (
	datab => inst7_aLcdVSCnt_a1_a,
	datac => inst7_aLcdVSCnt_a0_a,
	datad => inst7_aLcdVSCnt_a9_a,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	combout => inst7_areduce_nor_a1361);

inst7_aSelect_a256_I : maxii_lcell
-- Equation(s):
-- inst7_aSelect_a256 = inst7_areduce_nor_a2 # inst7_areduce_nor_a1360 & inst7_aLcdDE & inst7_areduce_nor_a1361

-- pragma translate_off
GENERIC MAP (
	operation_mode => "normal",
	synch_mode => "off",
	register_cascade_mode => "off",
	sum_lutc_input => "datac",
	lut_mask => "EAAA",
	output_mode => "comb_only")
-- pragma translate_on
PORT MAP (
	dataa => inst7_areduce_nor_a2,
	datab => inst7_areduce_nor_a1360,
	datac => inst7_aLcdDE,
	datad => inst7_areduce_nor_a1361,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	combout => inst7_aSelect_a256);

inst7_areduce_nor_a1365_I : maxii_lcell
-- Equation(s):
-- inst7_areduce_nor_a1365 = inst7_aLcdVSCnt_a3_a & inst7_aLcdVSCnt_a2_a & inst7_aLcdVSCnt_a4_a & !inst7_aLcdVSCnt_a1_a # !inst7_aLcdVSCnt_a3_a & !inst7_aLcdVSCnt_a2_a & !inst7_aLcdVSCnt_a4_a & inst7_aLcdVSCnt_a1_a

-- pragma translate_off
GENERIC MAP (
	operation_mode => "normal",
	synch_mode => "off",
	register_cascade_mode => "off",
	sum_lutc_input => "datac",
	lut_mask => "0180",
	output_mode => "comb_only")
-- pragma translate_on
PORT MAP (
	dataa => inst7_aLcdVSCnt_a3_a,
	datab => inst7_aLcdVSCnt_a2_a,
	datac => inst7_aLcdVSCnt_a4_a,
	datad => inst7_aLcdVSCnt_a1_a,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	combout => inst7_areduce_nor_a1365);

inst7_areduce_nor_a1364_I : maxii_lcell
-- Equation(s):
-- inst7_areduce_nor_a1364 = inst7_aLcdVSCnt_a0_a & (!inst7_aLcdVSCnt_a9_a)

-- pragma translate_off
GENERIC MAP (
	operation_mode => "normal",
	synch_mode => "off",
	register_cascade_mode => "off",
	sum_lutc_input => "datac",
	lut_mask => "00AA",
	output_mode => "comb_only")
-- pragma translate_on
PORT MAP (
	dataa => inst7_aLcdVSCnt_a0_a,
	datad => inst7_aLcdVSCnt_a9_a,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	combout => inst7_areduce_nor_a1364);

inst7_areduce_nor_a1362_I : maxii_lcell
-- Equation(s):
-- inst7_areduce_nor_a1362 = inst7_aLcdVSCnt_a0_a & (!inst7_aLcdVSCnt_a9_a # !inst7_aLcdVSCnt_a3_a # !inst7_aLcdVSCnt_a2_a) # !inst7_aLcdVSCnt_a0_a & (inst7_aLcdVSCnt_a2_a # inst7_aLcdVSCnt_a3_a)

-- pragma translate_off
GENERIC MAP (
	operation_mode => "normal",
	synch_mode => "off",
	register_cascade_mode => "off",
	sum_lutc_input => "datac",
	lut_mask => "7EFE",
	output_mode => "comb_only")
-- pragma translate_on
PORT MAP (
	dataa => inst7_aLcdVSCnt_a0_a,
	datab => inst7_aLcdVSCnt_a2_a,
	datac => inst7_aLcdVSCnt_a3_a,
	datad => inst7_aLcdVSCnt_a9_a,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	combout => inst7_areduce_nor_a1362);

inst7_areduce_nor_a1363_I : maxii_lcell
-- Equation(s):
-- inst7_areduce_nor_a1363 = !inst7_aLcdVSCnt_a1_a & !inst7_aLcdVSCnt_a4_a & !inst7_areduce_nor_a1362

-- pragma translate_off
GENERIC MAP (
	operation_mode => "normal",
	synch_mode => "off",
	register_cascade_mode => "off",
	sum_lutc_input => "datac",
	lut_mask => "0101",
	output_mode => "comb_only")
-- pragma translate_on
PORT MAP (
	dataa => inst7_aLcdVSCnt_a1_a,
	datab => inst7_aLcdVSCnt_a4_a,
	datac => inst7_areduce_nor_a1362,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	combout => inst7_areduce_nor_a1363);

inst7_areduce_nor_a1366_I : maxii_lcell
-- Equation(s):
-- inst7_areduce_nor_a1366 = inst7_areduce_nor_a1358 & (inst7_areduce_nor_a1363 # inst7_areduce_nor_a1365 & inst7_areduce_nor_a1364)

-- pragma translate_off
GENERIC MAP (
	operation_mode => "normal",
	synch_mode => "off",
	register_cascade_mode => "off",
	sum_lutc_input => "datac",
	lut_mask => "CC80",
	output_mode => "comb_only")
-- pragma translate_on
PORT MAP (
	dataa => inst7_areduce_nor_a1365,
	datab => inst7_areduce_nor_a1358,
	datac => inst7_areduce_nor_a1364,
	datad => inst7_areduce_nor_a1363,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	combout => inst7_areduce_nor_a1366);

inst7_aLcdDE_aI : maxii_lcell
-- Equation(s):
-- inst7_aLcdDE = DFFEAS(inst7_aSelect_a256 # inst7_aLcdDE & (inst7_areduce_nor_a4 # !inst7_areduce_nor_a1366), GLOBAL(inst5_aLcdHS), VCC, , , , , , )

-- pragma translate_off
GENERIC MAP (
	operation_mode => "normal",
	synch_mode => "off",
	register_cascade_mode => "off",
	sum_lutc_input => "datac",
	lut_mask => "EAFA",
	output_mode => "reg_only")
-- pragma translate_on
PORT MAP (
	clk => inst5_aLcdHS,
	dataa => inst7_aSelect_a256,
	datab => inst7_areduce_nor_a4,
	datac => inst7_aLcdDE,
	datad => inst7_areduce_nor_a1366,
	aclr => GND,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	regout => inst7_aLcdDE);

inst8_aI : maxii_lcell
-- Equation(s):
-- inst8 = inst5_aLcdDE & (inst7_aLcdDE)

-- pragma translate_off
GENERIC MAP (
	operation_mode => "normal",
	synch_mode => "off",
	register_cascade_mode => "off",
	sum_lutc_input => "datac",
	lut_mask => "CC00",
	output_mode => "comb_only")
-- pragma translate_on
PORT MAP (
	datab => inst5_aLcdDE,
	datad => inst7_aLcdDE,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	combout => inst8);

inst5_aSelect_a246_I : maxii_lcell
-- Equation(s):
-- inst5_aSelect_a246 = inst5_areduce_nor_a1440 # inst5_areduce_nor_a1436 & inst5_aLcdHS & inst5_areduce_nor_a1434

-- pragma translate_off
GENERIC MAP (
	operation_mode => "normal",
	synch_mode => "off",
	register_cascade_mode => "off",
	sum_lutc_input => "datac",
	lut_mask => "ECCC",
	output_mode => "comb_only")
-- pragma translate_on
PORT MAP (
	dataa => inst5_areduce_nor_a1436,
	datab => inst5_areduce_nor_a1440,
	datac => inst5_aLcdHS,
	datad => inst5_areduce_nor_a1434,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	combout => inst5_aSelect_a246);

inst5_areduce_nor_a2_I : maxii_lcell
-- Equation(s):
-- inst5_areduce_nor_a2 = inst5_areduce_nor_a1433 & inst5_areduce_nor_a1441 & inst5_areduce_nor_a1432 & inst5_areduce_nor_a1435

-- pragma translate_off
GENERIC MAP (
	operation_mode => "normal",
	synch_mode => "off",
	register_cascade_mode => "off",
	sum_lutc_input => "datac",
	lut_mask => "8000",
	output_mode => "comb_only")
-- pragma translate_on
PORT MAP (
	dataa => inst5_areduce_nor_a1433,
	datab => inst5_areduce_nor_a1441,
	datac => inst5_areduce_nor_a1432,
	datad => inst5_areduce_nor_a1435,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	combout => inst5_areduce_nor_a2);

inst5_aLcdHS_aI : maxii_lcell
-- Equation(s):
-- inst5_aLcdHS = DFFEAS(inst5_aSelect_a246 # inst5_aLcdHS & (inst5_areduce_nor_a2 # !inst5_areduce_nor_a1446), GLOBAL(Clk25M_acombout), VCC, , , , , , )

-- pragma translate_off
GENERIC MAP (
	operation_mode => "normal",
	synch_mode => "off",
	register_cascade_mode => "off",
	sum_lutc_input => "datac",
	lut_mask => "FABA",
	output_mode => "reg_only")
-- pragma translate_on
PORT MAP (
	clk => Clk25M_acombout,
	dataa => inst5_aSelect_a246,
	datab => inst5_areduce_nor_a1446,
	datac => inst5_aLcdHS,
	datad => inst5_areduce_nor_a2,
	aclr => GND,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	regout => inst5_aLcdHS);

inst7_aSelect_a258_I : maxii_lcell
-- Equation(s):
-- inst7_aSelect_a258 = inst7_aLcdVS & !inst7_aLcdVSCnt_a1_a & !inst7_aLcdVSCnt_a0_a & inst7_aLcdVSCnt_a9_a

-- pragma translate_off
GENERIC MAP (
	operation_mode => "normal",
	synch_mode => "off",
	register_cascade_mode => "off",
	sum_lutc_input => "datac",
	lut_mask => "0200",
	output_mode => "comb_only")
-- pragma translate_on
PORT MAP (
	dataa => inst7_aLcdVS,
	datab => inst7_aLcdVSCnt_a1_a,
	datac => inst7_aLcdVSCnt_a0_a,
	datad => inst7_aLcdVSCnt_a9_a,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	combout => inst7_aSelect_a258);

inst7_aSelect_a259_I : maxii_lcell
-- Equation(s):
-- inst7_aSelect_a259 = inst7_areduce_nor_a1360 & (inst7_aSelect_a258 # inst7_aLcdVSCnt_a1_a & inst7_areduce_nor_a1364)

-- pragma translate_off
GENERIC MAP (
	operation_mode => "normal",
	synch_mode => "off",
	register_cascade_mode => "off",
	sum_lutc_input => "datac",
	lut_mask => "CC80",
	output_mode => "comb_only")
-- pragma translate_on
PORT MAP (
	dataa => inst7_aLcdVSCnt_a1_a,
	datab => inst7_areduce_nor_a1360,
	datac => inst7_areduce_nor_a1364,
	datad => inst7_aSelect_a258,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	combout => inst7_aSelect_a259);

inst7_aLcdVS_aI : maxii_lcell
-- Equation(s):
-- inst7_aLcdVS = DFFEAS(inst7_aSelect_a259 # inst7_aLcdVS & (inst7_areduce_nor_a2 # !inst7_areduce_nor_a1366), GLOBAL(inst5_aLcdHS), VCC, , , , , , )

-- pragma translate_off
GENERIC MAP (
	operation_mode => "normal",
	synch_mode => "off",
	register_cascade_mode => "off",
	sum_lutc_input => "datac",
	lut_mask => "FDCC",
	output_mode => "reg_only")
-- pragma translate_on
PORT MAP (
	clk => inst5_aLcdHS,
	dataa => inst7_areduce_nor_a1366,
	datab => inst7_aSelect_a259,
	datac => inst7_areduce_nor_a2,
	datad => inst7_aLcdVS,
	aclr => GND,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	regout => inst7_aLcdVS);

LcdPWM_aI : maxii_io
-- pragma translate_off
GENERIC MAP (
	operation_mode => "output")
-- pragma translate_on
PORT MAP (
	datain => inst_aLcdPWMCache,
	oe => VCC,
	padio => ww_LcdPWM);

Nce_aI : maxii_io
-- pragma translate_off
GENERIC MAP (
	operation_mode => "input")
-- pragma translate_on
PORT MAP (
	oe => GND,
	padio => ww_Nce);

Noe_aI : maxii_io
-- pragma translate_off
GENERIC MAP (
	operation_mode => "input")
-- pragma translate_on
PORT MAP (
	oe => GND,
	padio => ww_Noe);

Nwe_aI : maxii_io
-- pragma translate_off
GENERIC MAP (
	operation_mode => "input")
-- pragma translate_on
PORT MAP (
	oe => GND,
	padio => ww_Nwe);

SysAddrBus_a23_a_aI : maxii_io
-- pragma translate_off
GENERIC MAP (
	operation_mode => "input")
-- pragma translate_on
PORT MAP (
	oe => GND,
	padio => ww_SysAddrBus(23));

SysAddrBus_a22_a_aI : maxii_io
-- pragma translate_off
GENERIC MAP (
	operation_mode => "input")
-- pragma translate_on
PORT MAP (
	oe => GND,
	padio => ww_SysAddrBus(22));

SysAddrBus_a21_a_aI : maxii_io
-- pragma translate_off
GENERIC MAP (
	operation_mode => "input")
-- pragma translate_on
PORT MAP (
	oe => GND,
	padio => ww_SysAddrBus(21));

SysAddrBus_a20_a_aI : maxii_io
-- pragma translate_off
GENERIC MAP (
	operation_mode => "input")
-- pragma translate_on
PORT MAP (
	oe => GND,
	padio => ww_SysAddrBus(20));

SysAddrBus_a19_a_aI : maxii_io
-- pragma translate_off
GENERIC MAP (
	operation_mode => "input")
-- pragma translate_on
PORT MAP (
	oe => GND,
	padio => ww_SysAddrBus(19));

SysAddrBus_a18_a_aI : maxii_io
-- pragma translate_off
GENERIC MAP (
	operation_mode => "input")
-- pragma translate_on
PORT MAP (
	oe => GND,
	padio => ww_SysAddrBus(18));

SysAddrBus_a17_a_aI : maxii_io
-- pragma translate_off
GENERIC MAP (
	operation_mode => "input")
-- pragma translate_on
PORT MAP (
	oe => GND,
	padio => ww_SysAddrBus(17));

SysAddrBus_a16_a_aI : maxii_io
-- pragma translate_off
GENERIC MAP (
	operation_mode => "input")
-- pragma translate_on
PORT MAP (
	oe => GND,
	padio => ww_SysAddrBus(16));

SysAddrBus_a15_a_aI : maxii_io
-- pragma translate_off
GENERIC MAP (
	operation_mode => "input")
-- pragma translate_on
PORT MAP (
	oe => GND,
	padio => ww_SysAddrBus(15));

SysAddrBus_a14_a_aI : maxii_io
-- pragma translate_off
GENERIC MAP (
	operation_mode => "input")
-- pragma translate_on
PORT MAP (
	oe => GND,
	padio => ww_SysAddrBus(14));

SysAddrBus_a13_a_aI : maxii_io
-- pragma translate_off
GENERIC MAP (
	operation_mode => "input")
-- pragma translate_on
PORT MAP (
	oe => GND,
	padio => ww_SysAddrBus(13));

SysAddrBus_a12_a_aI : maxii_io
-- pragma translate_off
GENERIC MAP (
	operation_mode => "input")
-- pragma translate_on
PORT MAP (
	oe => GND,
	padio => ww_SysAddrBus(12));

SysAddrBus_a11_a_aI : maxii_io
-- pragma translate_off
GENERIC MAP (
	operation_mode => "input")
-- pragma translate_on
PORT MAP (
	oe => GND,
	padio => ww_SysAddrBus(11));

SysAddrBus_a10_a_aI : maxii_io
-- pragma translate_off
GENERIC MAP (
	operation_mode => "input")
-- pragma translate_on
PORT MAP (
	oe => GND,
	padio => ww_SysAddrBus(10));

SysAddrBus_a9_a_aI : maxii_io
-- pragma translate_off
GENERIC MAP (
	operation_mode => "input")
-- pragma translate_on
PORT MAP (
	oe => GND,
	padio => ww_SysAddrBus(9));

SysAddrBus_a8_a_aI : maxii_io
-- pragma translate_off
GENERIC MAP (
	operation_mode => "input")
-- pragma translate_on
PORT MAP (
	oe => GND,
	padio => ww_SysAddrBus(8));

SysAddrBus_a7_a_aI : maxii_io
-- pragma translate_off
GENERIC MAP (
	operation_mode => "input")
-- pragma translate_on
PORT MAP (
	oe => GND,
	padio => ww_SysAddrBus(7));

SysAddrBus_a6_a_aI : maxii_io
-- pragma translate_off
GENERIC MAP (
	operation_mode => "input")
-- pragma translate_on
PORT MAP (
	oe => GND,
	padio => ww_SysAddrBus(6));

SysAddrBus_a5_a_aI : maxii_io
-- pragma translate_off
GENERIC MAP (
	operation_mode => "input")
-- pragma translate_on
PORT MAP (
	oe => GND,
	padio => ww_SysAddrBus(5));

SysAddrBus_a4_a_aI : maxii_io
-- pragma translate_off
GENERIC MAP (
	operation_mode => "input")
-- pragma translate_on
PORT MAP (
	oe => GND,
	padio => ww_SysAddrBus(4));

SysAddrBus_a3_a_aI : maxii_io
-- pragma translate_off
GENERIC MAP (
	operation_mode => "input")
-- pragma translate_on
PORT MAP (
	oe => GND,
	padio => ww_SysAddrBus(3));

SysAddrBus_a2_a_aI : maxii_io
-- pragma translate_off
GENERIC MAP (
	operation_mode => "input")
-- pragma translate_on
PORT MAP (
	oe => GND,
	padio => ww_SysAddrBus(2));

SysAddrBus_a1_a_aI : maxii_io
-- pragma translate_off
GENERIC MAP (
	operation_mode => "input")
-- pragma translate_on
PORT MAP (
	oe => GND,
	padio => ww_SysAddrBus(1));

SysAddrBus_a0_a_aI : maxii_io
-- pragma translate_off
GENERIC MAP (
	operation_mode => "input")
-- pragma translate_on
PORT MAP (
	oe => GND,
	padio => ww_SysAddrBus(0));

SysDatBus_a15_a_aI : maxii_io
-- pragma translate_off
GENERIC MAP (
	operation_mode => "input")
-- pragma translate_on
PORT MAP (
	oe => GND,
	padio => ww_SysDatBus(15));

SysDatBus_a14_a_aI : maxii_io
-- pragma translate_off
GENERIC MAP (
	operation_mode => "input")
-- pragma translate_on
PORT MAP (
	oe => GND,
	padio => ww_SysDatBus(14));

SysDatBus_a13_a_aI : maxii_io
-- pragma translate_off
GENERIC MAP (
	operation_mode => "input")
-- pragma translate_on
PORT MAP (
	oe => GND,
	padio => ww_SysDatBus(13));

SysDatBus_a12_a_aI : maxii_io
-- pragma translate_off
GENERIC MAP (
	operation_mode => "input")
-- pragma translate_on
PORT MAP (
	oe => GND,
	padio => ww_SysDatBus(12));

SysDatBus_a11_a_aI : maxii_io
-- pragma translate_off
GENERIC MAP (
	operation_mode => "input")
-- pragma translate_on
PORT MAP (
	oe => GND,
	padio => ww_SysDatBus(11));

SysDatBus_a10_a_aI : maxii_io
-- pragma translate_off
GENERIC MAP (
	operation_mode => "input")
-- pragma translate_on
PORT MAP (
	oe => GND,
	padio => ww_SysDatBus(10));

SysDatBus_a9_a_aI : maxii_io
-- pragma translate_off
GENERIC MAP (
	operation_mode => "input")
-- pragma translate_on
PORT MAP (
	oe => GND,
	padio => ww_SysDatBus(9));

SysDatBus_a8_a_aI : maxii_io
-- pragma translate_off
GENERIC MAP (
	operation_mode => "input")
-- pragma translate_on
PORT MAP (
	oe => GND,
	padio => ww_SysDatBus(8));

SysDatBus_a7_a_aI : maxii_io
-- pragma translate_off
GENERIC MAP (
	operation_mode => "input")
-- pragma translate_on
PORT MAP (
	oe => GND,
	padio => ww_SysDatBus(7));

SysDatBus_a6_a_aI : maxii_io
-- pragma translate_off
GENERIC MAP (
	operation_mode => "input")
-- pragma translate_on
PORT MAP (
	oe => GND,
	padio => ww_SysDatBus(6));

SysDatBus_a5_a_aI : maxii_io
-- pragma translate_off
GENERIC MAP (
	operation_mode => "input")
-- pragma translate_on
PORT MAP (
	oe => GND,
	padio => ww_SysDatBus(5));

SysDatBus_a4_a_aI : maxii_io
-- pragma translate_off
GENERIC MAP (
	operation_mode => "input")
-- pragma translate_on
PORT MAP (
	oe => GND,
	padio => ww_SysDatBus(4));

SysDatBus_a3_a_aI : maxii_io
-- pragma translate_off
GENERIC MAP (
	operation_mode => "input")
-- pragma translate_on
PORT MAP (
	oe => GND,
	padio => ww_SysDatBus(3));

SysDatBus_a2_a_aI : maxii_io
-- pragma translate_off
GENERIC MAP (
	operation_mode => "input")
-- pragma translate_on
PORT MAP (
	oe => GND,
	padio => ww_SysDatBus(2));

SysDatBus_a1_a_aI : maxii_io
-- pragma translate_off
GENERIC MAP (
	operation_mode => "input")
-- pragma translate_on
PORT MAP (
	oe => GND,
	padio => ww_SysDatBus(1));

SysDatBus_a0_a_aI : maxii_io
-- pragma translate_off
GENERIC MAP (
	operation_mode => "input")
-- pragma translate_on
PORT MAP (
	oe => GND,
	padio => ww_SysDatBus(0));

LcdDE_aI : maxii_io
-- pragma translate_off
GENERIC MAP (
	operation_mode => "output")
-- pragma translate_on
PORT MAP (
	datain => inst8,
	oe => VCC,
	padio => ww_LcdDE);

LcdVS_aI : maxii_io
-- pragma translate_off
GENERIC MAP (
	operation_mode => "output")
-- pragma translate_on
PORT MAP (
	datain => inst7_aLcdVS,
	oe => VCC,
	padio => ww_LcdVS);

LcdHS_aI : maxii_io
-- pragma translate_off
GENERIC MAP (
	operation_mode => "output")
-- pragma translate_on
PORT MAP (
	datain => inst5_aLcdHS,
	oe => VCC,
	padio => ww_LcdHS);
END structure;


